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Trias Romania
 
PLM – FPGA Design / Verifikation - Kabelbaumentwurf
Die TRIAS Mikroelektronik GmbH, gegründet 1989, hat sich zu einem führenden Distributionsunternehmen entwickelt in den Bereichen EDA Tools (Electronic Design Automation) und Product Lifecycle Management (PLM) Lösungen.

TRIAS ist fokussiert auf EDA Lösungen für das FPGA Design und die – Verifikation, wie auch auf den Kabelbaumentwurf mit automatischer Dokumentenerstellung.

Unser Tochterunternehmen in Rumänien liefert für ost-europäische Kunden zusätzlich Lösungen für den PCB Entwurf (PADS / Expedition / Hyperlynx).

TRIAS ist seit 1999 der autorisierte Fachhändler der Mentor Graphics. Neben den Lösungen von Mentor Graphics bietet TRIAS komplementäre Produkte von innovativen Herstellern an, um aus einer Hand beziehend, durchgängige Lösungen anzubieten.

Neben Vertrieb und Marketing, unterstützen erfahrene Ingenieure der TRIAS unsere Kunden im technischen Support, in der Beratung und in weitere Dienstleistungen rund um unsere Lösungen.

TRIAS expandiert und wurde der Vertragspartner der Dassault Systèmes verantwortlich für die Branche « High-Tech – Electronic ».

Dassault Systèmes, der Anbieter von 3DEXPERIENCE, bietet Nutzern eine virtuelle Welt, in der ihren Ideen zur nachhaltigen Innovation keine Grenzen gesetzt sind. Seine Product Lifecycle Management (PLM) Lösungen revolutionieren die Art und Weise, wie Produkte entwickelt, produziert und gewartet werden.

 
Breaking News
Upcoming Events
  • User2User Europe 2016
    The Mentor Graphics User Conference
    • Park Hilton, Munich, October 11, 2016

      The Mentor Graphics European User Conference 2016 brings together the entire Mentor Graphics technology user community in Europe.

      Attendees share best practices, experiences, challenges and the solutions that they have learned about designing, developing and deploying high quality products.

      TRIAS is there as an exhibitor partner focused on EDA solutions for FPGA / IC Design and advanced verification solutions.

      Our experienced engineers advise and provide training for FPGA / IC developers in SystemVerilog / UVM, VHDL-2008 / OSVVM and UVVM amongst others.

      We provide Clock-Domain Crossing Analysis, Formal Verification, Verification IP and an easy entry into UVM especially for more complex FPGA designs.

      More information and registration


  • DVCON Europe 2016
    Design and Verification Conference and Exhibition
    • 19. – 20. Oktober 2016 in München

      DVCon Europe 2016 attendees have the opportunity to take part in the many informal, but often intense, technical discussions that pop-up around the conference venue among 500+ design and verification engineers and engineering managers. This networking opportunity among peers is possibly the greatest benefit to DVCon Europe attendees. Finally,  attendees have access to the vendors of advanced design and verification tools, IP/VIP and services who exhibit at the conference.

      TRIAS wird dort als Aussteller und über unseren Partner Bitvis / UVVM Vortragender "Advanced verification methodology UVVM in VHDL for complex FPGA designs" sein.


      Weitere Informationen finden Sie unter

  • IESF 2016
    Integrated Electrical Solutions Forum (Automotive)
    • October 20, 2016 in Munich

      IESF is a global conference program for electrical/electronic design engineers, managers and executives. Each IESF event focuses on EE design issues in the Automotive, Military and Aerospace, Off-Highway, and Commercial Vehicles sectors.

      IESF events include a mixture of keynotes, guest speakers, technical breakout sessions, panels and networking events.

      Experience IESF

      • Inspirational keynote presentations at the leading edge of EE design and engineering
      • The latest trends, best practices, and hot topics condensed into sessions that resonate with modern design engineers and their management
      • A product expo featuring dozens of the latest tools, products, and industry experts
      • Fun evening events and plenty of networking opportunities

      Join us (TRIAS & Mentor Graphics) at the Munich Marriott hotel to discuss automotive trends on connectivity & networking; in-car experience; safety & security; and subsystems & technology. Sponsored by Mentor Automotive.
      See agenda and register below:

      More information

      Agenda

      Registration

      If you like to make an appointment with us, please contact us under info(kein_spam)trias-mikro.de or call us under +49 (0)2151-95301-0.

 
Upcoming Education & Training
  • SystemVerilog – Advanced Verification for FPGA Design
    • Nov 08 – 10, 2016
    • Other dates & locations on request
    View Details
  • VHDL - 2008 / OSVVM
    • Nov 30 – Dec 01, 2016
    • Other dates & locations on request

    View Details

  • Verilog for VHDL User
    • Dates & locations on request

    View Details
  • Accelerating FPGA and Digital ASIC Design
    • Nov 02 – 03, 2016
    • Other dates & locations on request

    View Details
  • Accelerating FPGA VHDL Verification
    • Dec 06 – 08, 2016
    • Other dates & locations on request

    View Details
  • Signal Integrity for Hardware Designer
    • Oct 11 – 13, 2016
    • Other dates & locations on request

    View Details
  • Signal Integrity: High-Speed Memory Interfaces
    • Nov 01 – 02, 2016
    • Other dates & locations on request

    View Details
 
Upcoming Web Seminars
 
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